The objective of WP2 is to investigate and to develop an ultra high speed SiGe:C Bipolar technology in order to achieve performance targets such as 500 GHz maximum oscillation frequency (f max ) and 2.5 ps gate delay (τD ) . These performance targets are very challenging and significantly improve the state-of-the-art of currently available SiGe:C Bipolar technologies. Additionally, WP2 serves for the fabrication of the demanding mm-wave circuit demonstrators designed in WP5. These demonstration circuits will also be enable a benchmarking of the various technological approaches and developments which will be explored in DOTFIVE.
Today worldwide no general consensus exists on the SiGe HBT architecture which is best suited for a 500 GHz SiGe HBT technology. From the present point of view self-aligned emitter/base structures are mandatory in order to suppress unwanted parasitics as far as possible. Promising candidates are the double polysilicon self-aligned transistor configuration using a selective epitaxial base deposition process for the integration of the SiGe base or the so-called raised extrinsic base transistor using non-selective epitaxy for SiGe base deposition in combination with an additional epitaxial deposition process for forming the raised extrinsic base contact. Today it is not predictable which transistor configuration will provide the best route for finally achieving a 500 GHz SiGe technology. Therefore different approaches will be explored in workpackages WP2 and WP3.
The work of ST and IFX in WP2 will be based on the so called double polysilicon self-aligned SiGe HBT which requires a selective deposition process for the integration of the SiGe:C base. For achieving our demanding performance targets, this SiGe HBT architecture has to be extremely scaled down both laterally and vertically in order to reduce parasitics as far as possible and to simultaneously improve forward transit time and base resistance far beyond the present state-of-the-art.
Today it is not known whether the rather evolutionary approach of WP2, starting from known materials and a known transistor structure is sufficient and the most appropriate route for achieving the demanding goals of the DOTFIVE project. Therefore research on new materials, new transistor modules, and alternative SiGe HBT architectures is indispensable to provide new routes for disruptive performance enhancements of SiGe:C Bipolar and BiCMOS technology in a non evolutionary manner. Such alternative and highly innovative technology concepts will be investigated and developed in WP3 by the research institutes IHP and IMEC.