Dotfive
Structure de mise en forme 2 colonnes

WP3 results for the year 3

At IHP, the successive modifications of a known, not self-aligned HBT concept have led first to the targeted DOTFIVE performance (fmax = 500GHz). In this case, structural changes contribute more to this result than simple scaling procedures.
Further performance enhancement of this alternative to the industrial standard double-poly approach depends on new ideas regarding a differential epitaxy process. Encouraging RF parameters could be achieve in a quite short development time also for a novel, fully self-aligned HBT process with selective base epitaxy. Here the external base region is formed after the base epitaxy in contrast to the standard double-poly design where it is prepared before. Aggressive lateral scaling combined with profile optimizations seems to be a promising way to advanced performance.
The progress of the high-speed performance of the investigated double-poly concept with lateral base link was limited due to problems with the controllability of the epi processes. Further ideas for the process control are needed to realize this attractive transistor architecture.


At imec, an arsenic doped sub-collector is introduced in imec’s fully self-aligned architecture, replacing the less controllable phosphorous doped sub-collector. DC results show that more aggressive collector dopant profiles are possible with arsenic and this without sacrificing the yield on the devices.
The thin and abrupt arsenic doped collector profiles are resulting in devices obtaining 245/460 GHz for fT/fmax. RF-results however came only available after the official due date of this deliverable due to process issues. Additional silicon was therefore processed. The delay was built up because of process issues with two consecutive integration lots.