IMEC has pushed the fmax of QSA transistors till 300 GHz through reduction of the device parasitics using advanced collector isolation. Although demonstrated on this particular platform, the airgap deep trench isolation can be used as replacement for polysilicon filled deep trench for any devices architecture using deep trench isolation.
The novel device architectures under study yielded fmax in excess of 300 GHz. These architectures, still under construction, have after very short development time reached a similar performance level as conventional architectures that leveraged many years of evolutionary scaling. This achievement is very promising for the next learning cycle with target 400 GHz.
IHP has achieved fT/fmax values of 300 GHz/350GHz and a ring-oscillator gate delay of 2.5 ps. These results were achieved with optimized double-poly architecture. Key features of this technology are a low-parasitic, lateral base-link, a self-aligned emitter process and an optimized epitaxial growth of the base layer by 45° rotated devices. Additionally, the silicide resistance has been reduced and the SIC implantation dose has been enhanced, compared to previous IHP-technologies.
The technology is still in an experimental development phase. Further enhancements towards a targeted fmax of 400 GHz seem possible by increasing the Ge-content in the base, by increasing the emitter doping and by scaling the emitter width.